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Theme: Synthesis-Based Engineering (SBE)

Cyber-physical systems often contain supervisory controllers, control software (the 'cyber' part) that is responsible for the correct and safe operation of the system. Supervisory controllers can be developed through traditional engineering, but a more modern approach is to use model-based engineering. Discrete event models of the to-be-controlled system are created, for instance in the form of state machines or activity diagrams. The models can then be validated through simulation, code can be generated to implement the controllers, and so on.

However, the models must still be created manually. For every state of the system, engineers must think of how to handle changes in sensor signals, and which activators may be enabled or must be disabled. A step beyond model-based engineering is to use synthesis-based engineering (SBE), which combines model-based engineering with design assistance. The main ingredient is supervisory controller synthesis, a technique to automatically synthesize correct-by-construction supervisory controllers, from models of the to-be-controlled system (the plant model) and the requirements (requirements model) that the controlled system must adhere to. The resulting models can be validated through simulation, additional properties can be verified through model checking, and the controller can be implemented through code generation.

Synthesis-based engineering allows to raise the abstraction level, allowing engineers to focus on what the system should do (the requirements), rather than how to achieve that (manual modeling of all situations). The computer-aided design assistance by means of synthesis, verification, and simulation assist the engineer, reduce effort and mistakes, improving design and engineering efficiency and improve the quality of the supervisory controller and the control software.

More information


Synthesis-based engineering and supervisory controller synthesis are a broad research area. It includes for instance the following research topics:

  • Efficient synthesis algorithms, such as symbolic algorithms, algorithms for dividing the system into parts and synthesizing supervisors for each of the parts, and so on.
  • Machine-independent metrics for measuring the performance of symbolic supervisory controller synthesis that manipulate Binary Decision Diagrams (BDDs).
  • Modeling approaches for dealing with faults in the system, such as broken wires and damaged actuators, to ensure fault-tolerant control.
  • PLC code generation for implementation of synthesized supervisory controllers on PLCs, bridging the fundamental differences between state machines and PLC code.
  • Real-world applications of the techniques in various domains, including semiconductor, infrastructure, healthcare, automotive, warehousing, printing, robotics, and many more. For instance, a car with a synthesized cruise-control controller drove around in real-world traffic, and a bridge with a synthesized controller passed the regular site acceptance test.
  • Automatic generation of models for synthesis, simulation and implementation from a configuration of the system, to support a configure-to-order way of working for product families.
  • ... and much more.


Various tools for supervisory controller synthesis exist, such as CIF and Supremica. CIF is part of the Eclipse ESCET open-source project. CIF supports the entire SBE development process of controllers, including among others specification, supervisory controller synthesis, simulation-based validation and visualization, verification, real-time testing, and code generation.

MSc projects

  • There are opportunities for both theoretical and more applied MSc graduation projects.
  • There are opportunities for both internal/university and external/company MSc graduation projects (for instance at Rijkswaterstaat, TNO or ASML).
  • Results of the projects could be incorporated into the open-source ESCET/CIF tools, if applicable.

If you're interested, contact Dennis Hendriks (<fistname> DOT <lastname> AT ru DOT nl).